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IS62C1024ALIS65C1024AL128K x 8 LOW POWER CMOSSTATIC RAMFEATURES High-speed access time: 35, 45 ns Low active power: 100 mW (typical) Low standby power: 20 µW (typical) CMOSstandby Output Enable (OE) and two Chip Enable(CE1 and CE2) inputs for ease in applications Fully static operation: no clock or refreshrequired TTL compatible inputs and outputs Single 5V ( 10%) power supply Commercial, Industrial, and Automotive temperature ranges available Standard Pin Configuration:— 32-pin SOP/ 32-pin TSOP (Type 1) Lead free availableDECEMBER 2017DESCRIPTIONThe ISSI IS62C1024AL/IS65C1024AL is a low power,131,072-word by 8-bit CMOS static RAM. It is fabricatedusing high-performance CMOS technology. This highlyreliable process coupled with innovative circuit designtechniques, yields higher performance and low powerconsumption devices.When CE1 is HIGH or CE2 is LOW (deselected), the deviceassumes a standby mode at which the power dissipationcan be reduced by using CMOS input levels.Easy memory expansion is provided by using two ChipEnable inputs, CE1 and CE2.The active LOW Write Enable(WE) controls both writing and reading of the memory.FUNCTIONAL BLOCK DIAGRAMA0-A16DECODER128K x 8MEMORY ARRAYVDDGNDI/ODATACIRCUITI/O0-I/O7COLUMN I/OCE1CE2OEWECONTROLCIRCUITCopyright 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes noliability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying onany published information and before placing orders for products.Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to causefailure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives writtenassurance to its satisfaction, that:a.) the risk of injury or damage has been minimized;b.) the user assume all such risks; andc.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstancesIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/20171

IS62C1024ALIS65C1024ALPIN CONFIGURATIONPIN CONFIGURATION32-Pin SOP32-Pin TSOP (Type 1I/O7I/O6I/O5I/O4I/O3GNDI/O2I/O1I/O0A0A1A2A3PIN DESCRIPTIONSA0-A16 Address InputsCE1Chip Enable 1 InputCE2Chip Enable 2 InputOEOutput Enable InputWEWrite Enable InputI/O0-I/O7 Input/OutputVddPowerGNDGroundOPERATING RANGE (IS62C1024AL)RangeCommercialIndustrialAmbient Temperature0 C to 70 C-40 C to 85 CVdd5V 10%5V 10%OPERATING RANGE (IS65C1024AL)RangeAutomotiveAmbient Temperature-40 C to 125 CVdd5V 10%TRUTH TABLEModeWENot SelectedX(Power-down)XOutput Disabled HReadHWriteL2CE1HXLLLCE2XLHHHOEI/O Operation Vdd CurrentXHigh-ZIsb1, Isb2X High-ZIsb1, Isb2HHigh-ZIccLDoutIccXDinIccIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017

IS62C1024ALIS65C1024ALABSOLUTE MAXIMUM RATINGS(1)SymbolVtermTstgPtIoutParameterTerminal Voltage with Respect to GNDStorage TemperaturePower DissipationDC Output Current (LOW)Value–0.5 to 7.0–65 to 1251.020UnitV CWmANotes:1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is astress rating only and functional operation of the device at these or any other conditions above those indicated in the operationalsections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect Input CapacitanceOutput CapacitanceConditionsVin 0VVout 0VMax.68UnitpFpFNotes:1. Tested initially and after any design or process changes that may affect these parameters.2. Test conditions: Ta 25 C, f 1 MHz, Vdd 5.0V.DC ELECTRICAL CHARACTERISTICS (Over Operating Range)Symbol ParameterTest ConditionsOptionsVohOutput HIGH VoltageVdd Min., Ioh –1.0 mAVolOutput LOW VoltageVdd Min., Iol 2.1 mAVihInput HIGH VoltageVilInput LOW Voltage(1)IliInput LeakageGND Vin VddCom.Ind.Auto.IloOutput LeakageGND Vout VddCom.CE1 Vih, orInd.CE2 Vil, or OE Vih orAuto.WE d 0.5V0.8V1µA251µA25Note:1. Vil (min.) -0.3V DC; Vil (min.) -2.0V AC (pulse width -2.0 ns). Not 100% tested.Vih (max.) Vdd 0.3V DC; Vih (max.) Vdd 2.0V AC (pulse width -2.0 ns). Not 100% tested.Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/20173

IS62C1024ALIS65C1024ALIS62C1024AL/IS65C1024ALPOWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)-35 ns-45 nsSymbol ParameterTest ConditionsMin. Max.Min. Max.UnitIccAverage operatingCE1 Vil, CE2 VihCom.—25mACurrentVin Vih or Vil,Ind.—30I I/O 0 mA, f 0Auto.—35Icc1Vdd Dynamic Operating Vdd Max., CE1 VilCom.—30mASupply CurrentIout 0 mA, f fmaxInd.—35Vin Vih or VilAuto.—40CE2 Vihtyp.(2)—20Isb1TTL Standby CurrentVdd Max.,Com.—1mA(TTL Inputs)Vin Vih or Vil, CE1 Vih,Ind.—1.5or CE2 Vil, f 0Auto.—2Isb2CMOS StandbyVdd Max.,Com.—5 µACurrent (CMOS Inputs) CE1 Vdd – 0.2V, orInd.—10CE2 0.2V, Vin Vdd – 0.2V, Auto.—45or Vin Vss 0.2V, f 0typ.(2)—4Note:1. At f fmax, address and data inputs are cycling at the maximum frequency, f 0 means no input lines change.2. Typical Values are measured at Vdd 5V, Ta 25oC and not 100% tested.READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating 2)tlzce1(2)tlzce2(2)thzce(2)ParameterRead Cycle TimeAddress Access TimeOutput Hold TimeCE1 Access TimeCE2 Access TimeOE Access TimeOE to Low-Z OutputOE to High-Z OutputCE1 to Low-Z OutputCE2 to Low-Z OutputCE1 or CE2 to High-Z Output-35 nsMin. 0-45 nsMin. 5UnitnsnsnsnsnsnsnsnsnsnsnsNotes:1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6to 2.4V and output loading specified in Figure 1a.2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.4Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017

IS62C1024ALIS65C1024ALAC TEST CONDITIONSParameterInput Pulse LevelInput Rise and Fall TimesInput and Output Timingand Reference LevelOutput LoadUnit0.6V to 2.4V5 ns1.5VSee Figures 1a and 1bAC TEST LOADS1838 Ω1838 Ω5V5VOUTPUTOUTPUT100 pFIncludingjig andscope993 Ω5 pFIncludingjig andscopeFigure 1a.993 ΩFigure 1b.AC WAVEFORMSREAD CYCLE NO. 1(1,2)tRCADDRESStAAtOHADOUTIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017tOHADATA VALID5

IS62C1024ALIS65C1024ALREAD CYCLE NO. CE2CE2DOUTtLZCE1/tLZCE2tHZCEHIGH-ZDATA VALIDNotes:1. WE is HIGH for a Read Cycle.2. The device is continuously selected. OE, CE1 Vil, CE2 Vih.3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low we(2)tlzwe(2)ParameterWrite Cycle TimeCE1 to Write EndCE2 to Write EndAddress Setup Time to Write EndAddress Hold from Write EndAddress Setup TimeWE Pulse WidthData Setup to Write EndData Hold from Write EndWE LOW to High-Z OutputWE HIGH to Low-Z Output-35 nsMin. 03—-45 nsMin. —ns25—ns0— ns—15ns5—nsNotes:1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6 to 2.4Vand output loading specified in Figure 1a.2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.3. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states toinitiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to therising or falling edge of the signal that terminates the Write.4. Tested with OE HIGH.6Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017

IS62C1024ALIS65C1024ALAC WAVEFORMSWRITE CYCLE NO. 1 (WE WE(4)WEtSADOUTtHZWEtLZWEHIGH-ZDATA UNDEFINEDtSDDINtHDDATA-IN VALIDWRITE CYCLE NO. 2 (CE1, CE2 WtPWE(4)WEtHZWEDOUTDATA UNDEFINEDtLZWEHIGH-ZtSDDINtHDDATA-IN VALIDNotes:1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states toinitiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to therising or falling edge of the signal that terminates the Write.2. I/O will assume the High-Z state if OE Vih.Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/20177

IS62C1024ALIS65C1024ALDATA RETENTION SWITCHING CHARACTERISTICSSymbol ParameterVdrVdd for Data RetentionIdrData Retention CurrenttsdrData Retention Setup TimetrdrRecovery TimeTest ConditionSee Data Retention WaveformVdd 2.0V, CE1 Vdd – 0.2VCom.or CE2 0.2VInd.Vin Vdd – 0.2V, or Vin Vss 0.2VAuto.See Data Retention WaveformSee Data Retention —trc —UnitVµAnsnsNote:1. Typical Values are measured at Vdd 5V, Ta 25oC and not 100% tested.DATA RETENTION WAVEFORM (CE1 Controlled)Data Retention ModetSDRtRDRVDD4.5V2.2VVDRCE1 VDD - 0.2VCE1GNDDATA RETENTION WAVEFORM (CE2 Controlled)Data Retention Mode4.5VVDDCE22.2VtSDRtRDRVDR0.4VCE2 0.2VGND8Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017

IS62C1024ALIS65C1024ALIndustrial Range: –40 C to 85 CSpeed (ns)3535Order Part c SOP, Lead-freeTSOP, Type 1, Lead-freeORDERING INFORMATION: IS65C1024ALAutomotive Range: -40 C to 125 CSpeed (ns)4545Order Part No.PackageIS65C1024AL-45QLA3 Plastic SOP, Lead-freeIS65C1024AL-45TLA3 TSOP, Type 1, Lead-freeIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/20179

IS62C1024ALIS65C1024AL10Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/2017

IS62C1024ALIS65C1024ALIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. H112/01/201711

2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL TRUTH TABLE Mode WE CE1CE2 OE I/O Operation Vdd Current Not Selected X H X X High-Z Isb1, Isb2 (Power-down)XX L X High-Z Isb1, Isb2 Output Disabled H L H H High-Z Icc ReadHL H LDout Icc Write L L H X DIn Icc